| DIP Switch Setting Method

CPU CoreVCC set Table
|
CoreVCC |
SW1 |
SW2 |
SW3 |
SW4 |
|
2.0V |
OFF |
OFF |
OFF |
OFF |
|
2.1V |
ON |
OFF |
OFF |
OFF |
|
2.2V |
OFF |
ON |
OFF |
OFF |
|
2.3V |
ON |
ON |
OFF |
OFF |
|
2.4V |
OFF |
OFF |
ON |
OFF |
|
2.5V |
ON |
OFF |
ON |
OFF |
|
2.6V |
OFF |
ON |
ON |
OFF |
|
2.7V |
ON |
ON |
ON |
OFF |
|
2.8V |
OFF |
OFF |
ON |
ON |
|
2.9V |
ON |
OFF |
OFF |
ON |
|
3.0V |
OFF |
ON |
OFF |
ON |
|
3.1V |
ON |
ON |
OFF |
ON |
|
3.2V |
OFF |
OFF |
ON |
ON |
|
3.3V |
ON |
OFF |
ON |
ON |
|
3.4V |
OFF |
ON |
ON |
ON |
|
3.5V |
ON |
ON |
ON |
ON |
Other functionality
|
DIP Switch |
Function |
ON |
OFF |
|
SW5 |
CMOS RAM function |
Clear CMOS RAM |
Enable write/save |
|
SW6 |
Password function |
Clear password |
Enable password |
|
SW7 |
CMOS setup function |
Disable to edit CMOS contents |
Enable to edit CMOS contents |
|
SW8 |
FDD write protect |
Disable to write data to Floppy disk |
Enable to write data to Floppy disk |
Jumper Setting Method
IOVCC set
This jumper is used for set of the CPU voltage like as
the CoreVCC set. Mostly the Pentium processor uses two
kind of power source - CoreVCC and IOVCC, and the
corresponding voltage level should be adjusted as
recommended in the CPU specification.
|
J15 |
CPU Type |
|
1-2 |
IOVCC = CoreVCC (single CPU power source ) |
|
2-3 (default) |
IOVCC = 3.3V (dual CPU power source ) |
L2 cache functionality
|
J14 |
L2 cache functionality |
|
1-2 |
Interleave mode |
|
2-3 (default) |
Linear mode |
OEM/ODM selector
These jumpers (J7 & J8) will be optional parts for the
OEM/ODM logo message selector.
Memory Clock Selector
These jumpers can set the frequency of the DIMM memory
(66, 75, 83, 90, and 100MHz )
For the proper operation, these jumpers should be set
together.
|
J16 |
J17 |
DIMM Module Frequency Selector |
Memory Type |
|
2-3 |
1-2 |
66MHz Only |
66MHz & 100MHz SDRAM, EDO |
|
1-2 |
2-3 |
Depend on CPU clock (66/75/83/90/100MHz) |
100MHz SDRAM only |
|
Front Side Bus Speed |
|
|
|
|
|
|
|
|
|
Speed (MHZ) |
60 |
66 |
75 |
83 |
95 |
100 |
|
Jumper |
|
|
|
|
|
|
|
J2 |
2-3 |
2-3 |
1-2 |
1-2 |
1-2 |
1-2 |
|
J9 |
2-3 |
2-3 |
1-2 |
1-2 |
2-3 |
2-3 |
|
J3 |
2-3 |
1-2 |
2-3 |
1-2 |
2-3 |
1-2 |
|
J4 |
2-3 |
2-3 |
2-3 |
2-3 |
1-2 |
1-2 |
|
J5 |
2-3 |
2-3 |
1-2 |
1-2 |
1-2 |
1-2 |
CPU frequency set
To set the CPU frequency correctly, the proper
combination should be selected in the CPU vendor, type,
and the internal speed.
|
Ratio |
x2.0 |
x2.5 |
x3.0 |
x3.5 |
x4.0 |
x4.5 |
x5.0 |
x5.5 |
x6.0* |
|
J11 |
2-3 |
2-3 |
1-2 |
1-2 |
2-3 |
2-3 |
1-2 |
1-2 |
2-3 |
|
J12 |
1-2 |
2-3 |
2-3 |
1-2 |
1-2 |
2-3 |
2-3 |
1-2 |
1-2 |
|
J13 |
1-2 |
1-2 |
1-2 |
1-2 |
2-3 |
2-3 |
2-3 |
2-3 |
1-2 |
|
|
|
|
|
|
|
|
|
|
|
|
*(Note: x2.0 setting
used with AMD cpu is recognized as x6.0) |
BF0/BF1/BF2: Set the bus speed ratio of
CPU =================> (J11,J12,J13)
FS0/FS1/FS2: Set the host clock frequency of the clock
generator => (J3,J4,J5)
HA26/HA27: Set the ratio between PCI clock and the host
clock => (J2,J9)
+ BF0/BF1/BF2 functionality are different with the CPU
vendor. |